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NEPES, GLOBAL TOP-TIER PARTNER

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News

Leading advanced packaging company Nepes Laweh continues its innovation in advanced package technology, following the 600mm FOPLP (Fan-out Panel Level Package).


Nepes Laweh announced that they have, for the first time in the world, implemented FOPLP solely through the Molding technique, without using the expensive Polyimide (PI), which is an essential material in the fan-out process.




▲Implementation of FO-PLP using PI alternative packaging technology(Photo=Nepes)



Based on Deca Technologies' M-Series™, this technology has been commercialized for the first time in the world by Nepes Laweh, and they have recently initiated product supplies to analog and automotive semiconductor company in the United States.


This technology, which does not use PI, not only simplifies the process and improves productivity, but also has the potential to enhance product reliability. It is expected that this technology can extensively replace traditional conventional molding packages, such as QFN.


In particular, analog semiconductor manufacturers, who frequently need to change and develop various products, can reduce the supply risk of materials like PCBs and lead frames. Additionally, it is a strong advantage that this technology allows for the transition to the fan-out process while maintaining existing semiconductor specifications, thus reducing the burden of new certifications for customers.


Especially for products with large production volumes and stringent front-end customer certifications, such as automotive Microcontroller Units (MCU), the company expects this technology to offer advantages in manufacturing and quality control.


A Nepes official conveyed, “The commercialization of fan-out molding technology is expected to further strengthen our technological competitiveness in the advanced package market.”


Nepes Laweh has strategized to expand its customer base by applying fan-out PLP technology to various application products, including industrial and automotive products, starting with the supply of analog semiconductor samples.