Nepes, a semiconductor post-processing (OSAT) specialist, is targeting the popular edge computing market with advanced packaging technology based on the fan-out (FO) process. It plans to target the 2.5D packaging and chiplet markets based on technologies such as RDL (re-wiring) interposers and silicon bridges. Kang In-soo, head of Nepes Semiconductor Research Institute (executive director), explained at the ‘Advanced Electronic Assembly Technology and Market Trend Seminar’ held at the Suwon Convention Center on the 2nd, “We are talking about on-device (edge) AI now, but in reality, it seems that the algorithms suitable for it have not yet transitioned to edge computing.” He added, “The inference AI market is expected to grow 10 times larger than the learning market in the future, which means that the AI ​​market that we can enjoy has not yet arrived.” He added, “I think the true AI era will come when we transition to popular edge computing, and we need to prepare for that era.”View original article = 네패스, 첨단 패키징 기술로 보급형 엣지 컴퓨팅 시장 공략- 시사저널e

Cheongju City announced on the 28th that it signed an investment agreement worth 160 billion won with Chungcheongbuk-do and Nepes, a system semiconductor advanced packaging specialist. The agreement was signed on the 27th.Nepes is a mid-sized company with global competitiveness in the system semiconductor advanced packaging sector. Through this agreement, it plans to invest in expanding production facilities at Ochang Plant 2 in Ochang-eup to respond to the increasing demand for high-performance AI semiconductors.With the expansion, Nepes is expected to establish itself as a global supplier of semiconductor packaging for AI data centers and chiplet (2.5D, 3D)* packaging.*Chiplet: A technology that designs and manufactures a single chip by dividing it into multiple small modular chips. Mainly used to integrate AI semiconductors and HBM (high bandwidth memory) into a single package.Cheongju City will actively support companies to carry out their business stably, and Nepes will actively participate in the development of the local economy by giving priority to local residents for new hires, participating in local construction companies, and purchasing local materials.A city official said, “Through this investment by Nepes, Cheongju’s status as a center for the advanced semiconductor industry will be further solidified,” and “We will not spare any support to ensure that the business is carried out smoothly.”Lee Byeong-gu, CEO of Nepes, said, “We will actively respond to the increasing demand for semiconductors for AI, such as data centers, autonomous driving, and humanoid robots, build a K-semiconductor cluster ecosystem, and achieve greater growth in the global semiconductor market.” He added, “We will also contribute to the revitalization of the local economy by coexisting with the local community.”청주시-㈜네패스, 1600억 ‘투자 협약’…AI 반도체 생산시설 확장 | Save Internet 뉴데일리

Jong Heon Kim, head of Nepes' Technology Development Division, gives a presentation on 'Trends and Role of Advanced Packaging Technology in High Performance Products' at the '2nd DigitalDaily Industry Conference (DIC) 2024', held from 1:00 p.m. on November 21st at the Yeouido FKI Tower Conference Center Diamond Hall in Seoul, Korea .[DigitalDaily reporter Kim Moon-ki] “Our continued efforts in packaging for the production of semiconductors in the AI era aim to increase production capacity. Nepes strives to bring not only productivity but also price competitiveness through fan-out (FO) packaging technology to silicon interposer. We will provide multiple services on a two-track basis, including technologies that cover 2.5D packaging and hold multiple chips in one package.”Jong Heon Kim spoke about Nepes' competitiveness on the topic of 'Trends and Role of Advanced Packaging Technology in High Performance Products'. “The current semiconductor market resembles a war more than a strategy. As the market gradually localizes, we must focus on our strengths,” Kim said, adding that ”the same is true for the advanced packaging field.”The pressure to follow Moore's Law is on, he notes. The curve of Moore's Law, which requires a doubling of scale every two years, has been bent. It costs around $500 million to design and test an existing chip and  $30-40 million to produce a single wafer. Difficulties in manufacturing and prolonged periods of development, along with the high cost are proving to be a challenge. “Packaging is the answer to physical limitations, manufacturing difficulties, and cost reduction,” said Kim. ”If there is a best practice in the construction of existing SoCs, we should follow it. Currently, chiplets are on the rise, as they can be divided by functions, in which simple processes and difficult processes are separated and put back together in the later stage of production."Kim, however, points out that while silicon intensifiers offer high performance and efficiency in 2.5D packaging, they can be costly. An alternative is fan-out (FO) and wafer-level package (WLP) technology, which Nepes focuses on. This technology involves packaging chips on a wafer-by-wafer basis. It is advantageous for cost reduction as it eliminates the need for printed circuit boards (PCBs) and reduces the number of processes.<source=nepes corp.><source=nepes corp.>Kim also emphasized the need to foster the entire cycle of production from Front-end process to Back-end process.“Even if the process is broken down into chiplets and put back together again, chip design and packaging must work together organically," he said. “In other words, it is important to build an ecosystem where the front and back are connected. In the end, the packaging and the chip must be designed together,” he said.“It is said that Korea's competitiveness requires reviewing packaging from its beginning stage. We believe that there is potential and possibility to foster a whole ecosystem of AI semiconductors because we have AI data, foundries, and data-based platform companies," he said, adding, "Korea is also in dire need of technology collaboration." [Source = DigitalDaily [DIC2024] 김종헌 네패스 “FO 패키징 ‘생산증가 원가절감’…韓 디자인-패키징 공급망 강화해야” - 디지털데일리]

Nepes participates in the International Symposium on Microelectronics and Packaging (ISMP), an international conference dedicated to the latest trends in semiconductor packaging technology. The 22nd ISMP, organized by the Korea Society of Microelectronics and Packaging, is held on November 6-8 at the Paradise Hotel in Busan, and is co-hosted with the 18th International Conference Reliability and Stress-Related Phenomena in Nanoelectronics(IRSP).On November 6-7, Nepes will introduce its core technologies, including chiplet and 2.3D technologies, at Lobby Booth 2. On November 6 at 3:50 p.m., Nepes Semiconductor Research Center's Advanced Technology Part Leader Lee Jung Won will present on the topic of “Chip-let Heterogeneous Integration Packaging Based on Fan-out RDL Interposer Technology”. 

▲Kim Jong-heon, Vice President, Lecture at the 2024 Industrialization Session of Nano KoreaNepes gave a lecture on advanced semiconductor packaging technology at 'Nano Korea 2024 Industrialization Session' held at KINTEX 1st exhibition hall in Goyang City on the 4th.Kim Jong-heon, vice president of Nepes CTO, said, "The advanced packaging technology in AI era; Chiplet and Integration ', introduced chiplet and heterogeneous packaging technology, a cutting-edge semiconductor packaging trend.Nano Korea is one of the world's top three nanotechnology events, hosted by the Ministry of Trade, Industry and Energy and the Ministry of Science and ICT, and organized by the Nano Convergence Research Association and the Nanotechnology Research Council. Among them, the industrialization session is a program that domestic and foreign global companies announce in-depth about the direction of their nanotechnology commercialization, and invited nine speakers of next-generation semiconductor and display industries, including Nepes, Samsung Electronics and SK Hynix, to give lectures.Vice President Kim Jong-heon said, "The development of Gen AI is accelerating changes in many fields such as life and industry," and explained, "In the packaging field as well as the entire semiconductor process, AI semiconductor-oriented bumping, 2.5D, and chiplet technologies continue to develop, and Nepes also has and develops related technologies and is pushing for commercialization."He added, "In addition to packaging technology, heat dissipation performance, which is closely related to power consumption, is also becoming important." He emphasized the importance of developing innovative materials along with package structure design.Meanwhile, Nano Korea is a high-tech exhibition that can confirm the commercialization status of nanotechnology and roadmap of famous domestic and foreign companies. 400 companies from 40 countries participated and 12,000 people visited.

Nepes participated in the 2024 Electronic Components and Technology Conference (ECTC) in Denver, Colorado, USA from May 28 to 31 (local time) to showcase advanced semiconductor packaging technology.Celebrating its 74th anniversary this year, the 2024 ECTC is an international event hosted by the IEEE-affiliated Electronics Packaging Society and boasts the world's largest electronic component technology society.Nepes presented a 600mm FOPLP solution and a chipset packaging based on a fan-out RDL interposer at the event.On the next day of the event, the technical program participated in the announcement of advanced packaging technology with Samsung Electronics and SK Hynix as Korean companies.Nepes introduced the excellence of FOPLP as a replacement for the traditional package QFN, titled '600mm x 600mm Fan-Out Panel Level Package (FOPLP) as an Alternative to Lead-Frame-Free Quad Flat No Lead (QFN) Package'.In the Interactive Presentations session held on the same day, I also presented my thesis on 'Single and Multi NPU Chiplet Heterogeneous Integration Packaging Based on Fan-Out RDL Interposer with Silicon Bridge Technology'.

Nepes has developed next-generation packaging PoP (Package on Package) technology for artificial intelligence (AI) and advanced semiconductor, and is working with domestic and foreign chip manufacturers to commercialize it.Recently, as the AI package market has been struggling with the global supply chain due to the oligopoly of Taiwanese companies, Nepes has developed and commercialized PoP technology, which is the base technology of 2.5D packaging *, utilizing its strengths, RDL technology.* 2.5D packaging: A technique for horizontally matching a semiconductor die on a wide substrate-shaped interposer, which is mainly used to integrate AI semiconductors and HBM (High Bandwidth Memory) into a single package.2.5D packaging, which is being developed by Nepes, has the advantage of price competitiveness and small form factor by implementing a rewiring (RDL) interposer using a fan-out process instead of an expensive silicon (Si) interposer.In particular, the developed PoP technology includes element technologies such as semiconductor device embedding technology, double-sided rewiring (RDL) technology, and Vertical Interconnection. It is a basic platform technology of advanced packaging that can expand its use to smartphone and automobile AP (Application Processor), wearable sensors, and AI semiconductors.Kim Jong-heon, chief executive officer of Nepes CTO, has been awarded "excellent performance by a global semiconductor company in Japan, a manufacturer of LiDAR sensors, which is a core technology for autonomous car, and is in the process of negotiating product applications. We are actively discussing commercialization. And based on the PoP technology developed this time, we will concentrate on 2.5D packaging technology for AI semiconductors and complete development with customers in the first half of 25 years and aim to mass-produce from the second half."Nepes is a strategic market that drives next-generation growth and aims to enter the commercialization of 2.5D and PoP technologies from the second half of 2025 by actively collaborating with AI server, automobile and edge computing product customers.press release inquiry : pr@nepes.co.kr

Nepes Semiconductors has announced that it has won a large number of low-power PMICs for AI servers from Seattle-based power semiconductor specialist fabless.The 8-inch is currently 3,000 wafers per month, but it will be increased to 20,000 wafers from the second quarter, and the 12-inch will secure production capacity of 10,000 wafers per month by this year and expand to 15,000 wafers per month by next year. The total investment is about 60 billion to 70 billion won.In particular, 12-inch products will be mainly supplied to the largest AI semiconductor server system in the United States, with up to 3,000 PMICs per system. As a result, low-power PMIC has been attracting much attention as a technology that maximizes the power efficiency of the server, and Nepes successfully commercialized this technology and won a large number of orders this time.Meanwhile, the Nepes Semiconductor division is continuing to grow significantly thanks to the growth of AI phones, and its existing business is continuing to grow steadily as OLED adoption increases in mobile phone and automotive electronics products.The Nepes Corp. has a semiconductor division and an electronic materials division, and the semiconductor division is expected to grow rapidly from 350 billion won in sales this year thanks to the growth of AI semiconductors and expect sales of more than 520 billion won in 2026, while the electronic materials division expects sales of more than 190 billion won in 2026 from 95 billion won this year. The Nepes Corp. expects sales of the two divisions to grow steeply over the next two years by forecasting sales of 445 billion won this year to 710 billion won in 2026.press release inquiry : pr@nepes.co.kr

Siemens Digital Industries Software today announced that South Korea-based nepes corporation, a global leader in Outsourced Semiconductor Assembly and Test (OSAT) services, has leveraged a range of industry-leading solutions from Siemens EDA to tackle the broad range of complex thermal, mechanical, and other IC packaging design challenges associated with developing advanced 3D IC packages.“nepes is committed to providing us with the most comprehensive portfolio of semiconductor packaging design and manufacturing services, to help us innovate and succeed in a market where high performance and compact form factors are critical.” said Brad Seo, vice president of SAPEON Korea’s R&D center. “By expanding nepes’ adoption and usage of Siemens’ EDA technologies for advanced packaging, we also can achieve the innovative technologies necessary to grow.”nepes has an established track record of providing customers with world-class packaging, testing, and semiconductor assembly services for clients throughout the global electronics industry. nepes also offers packaging design services including wafer level packaging, fan-out wafer level packages, and panel level packaging.Building on this foundation, nepes is now driving additional packaging innovation with a broad range of advanced technologies from Siemens EDA, including the Calibre® nmPlatform tool, HyperLynx™ software for electrical rule checking, Calibre® 3DSTACK software, as well as Siemens’ industry-leading Xpedition™ Substrate Integrator software and Xpedition™ Package Designer software. Together, these Siemens technologies helped nepes provide fast and reliable design services including 2.5D/3D-based chiplet designs for the company’s growing base of global IC customers....Read more : https://www.eejournal.com/industry_news/nepes-corporation-expands-ic-packaging-capabilities-for-the-3dic-era-with-advanced-design-flows-from-siemens/

Due to the explosive growth of the generative artificial intelligence market such as Chat GPT, demand for advanced packaging of power semiconductors(PMIC) used in artificial intelligence systems is exploding.The product that Nepes has won this time and is starting to mass-produce is a power semiconductor for AI chipsets and a high-tech PMIC product that will expand into high-performance computing (HPC) and automobile markets in the future.Nepes has established a bridgehead for global HPC and automobile markets, starting with mass production of power semiconductors by Global Fabless (US). This new customer is a member of the value chain of AI products and is working with Nepes in a strategic partnership to prepare for explosive growth.Nepes is developing a number of its customers' products in its advanced packaging line, and it is confirmed that PMIC first shipped last year is installed in AI chipsets of GPUs, CPUs, consumers and IoT companies. Also, The product is expected to be adopted for ADAS for automobiles.In addition, the two companies are currently collaborating on a 12-inch project and plan to develop products using the 600mm PLP process in the future, diversifying their products and processes and securing competitive advantage in the market.As semiconductor manufacturing bases have recently accelerated their departure from China and Taiwan, strategic partnerships with global chipmakers and Nepes are expected to become more robust. Nepes will take this opportunity to increase its market share and continue to secure 2.5D / 3D capabilities, the next generation package for artificial intelligence.A Nepes official said, "Nepes currently has core customers mainly in the smartphone market, and this strategic partnership with new customers has enabled us to target the growing HPC and automotive markets. From an industrial point of view, It will contribute to the structural growth of non-memory manufacturing ecosystems such as foundry and tests, strengthening advanced packaging infrastructure in Korea through attracting fabless."

-National project successfully completed... Optimization of manufacturing inspection equipment Deep learning acceleration IP development ▲Intelligent semiconductor ‘Metis’ for edge computing equipped with deep learning acceleration IPNepes (CEO Byeong-gu Lee), a cutting-edge semiconductor back-end process foundry company, announced on the 27th that it had succeeded in developing ‘METIS’, an intelligent semiconductor for edge computing.In April 2021, Nepes Artificial Intelligence Research Institute was selected as the 'Development of Intelligent Edge Computing Semiconductor for Lightening Manufacturing Inspection Equipment' project in the 'Artificial Intelligence Semiconductor Application Technology Development Project' hosted by the Institute for Information and Communication Planning and Evaluation (IITP) under the Ministry of Science and ICT in April 2021. was selected as the host company and conducted research through an industry-academia-research consortium with the Korea Institute of Electronic Technology and Hanyang University.The researchers developed a deep learning model for ultra-lightweight/ultra-precision manufacturing inspection equipment based on an automatic lightweight software framework with the research goal of ultra-lightweight/miniaturization, low-power consumption, and low-cost of existing server- or PC-based manufacturing inspection systems. Furthermore, using this, a deep learning acceleration IP optimized for data reuse and parallel computing processing was completed and installed on Metis.As a result, Nepes has developed a neural network-based deep learning defect detection algorithm that can reorganize the existing server-centered AI system into a terminal-centered one, and has secured a low-power SoC platform technology that reflects this. Through technological advancement, it has been able to increase productivity and efficiency at the manufacturing site. We hope to be able to contribute.In addition, Metis applied cx-BGA (Ball Grid Array) of nePACTM, Nepes' cutting-edge 2.5D & 3D package platform. nePACTM is a next-generation cutting-edge package technology that implements multi-layer and fine RDL wiring based on fan-out technology and flip chip bonding technology, and is suitable for highly integrated, high-performance chips such as artificial intelligence semiconductors.Yeonsook Park, head of Nepes Artificial Intelligence Research Center, said, “Through this research, we will solve network traffic issues in existing cloud server-type systems and secure intelligent processor technology that can detect defects at the edge, thereby developing various deep learning-related applications needed throughout the industry. “We have been able to accelerate it,” he said.Meanwhile, Nepes is carrying out national projects to develop core packaging technologies for system semiconductors and AI semiconductors, such as 'Development of chiplet heterogeneous integration ultra-high-performance artificial intelligence semiconductors' with a total project cost of KRW 44 billion hosted by the Ministry of Science and ICT, as well as AI semiconductors specialized for on-device. We are working to secure original technology.

-Introducing artificial intelligence semiconductors equipped with self-learning NPU IP-Securing source technology to advance on-device AI semiconductor technology ▲ Nepes participated in the 2023 Artificial Intelligence Semiconductor Future Technology ConferenceNepes(CEO B.K. Lee), a cutting-edge semiconductor back-end process foundry company, presented interim results of the artificial intelligence (AI) semiconductor research and development national project at the ‘2023 Artificial Intelligence Semiconductor Future Technology Conference’ hosted by the Ministry of Science and ICT on the 19th  This event is held every year, hosted by the Ministry of Science and ICT and organized by the Artificial Intelligence Semiconductor Forum, the Next-Generation Intelligent Semiconductor Business Group, and the Information and Communication Planning and Evaluation Institute to develop the AI semiconductor industry. In addition to exhibiting the AI semiconductor development achievements of participating companies, the Ministry of Science and ICT and domestic and foreign experts provide industry advice. We provide an opportunity to announce and discuss technology trends and major policy trends. At this event, which marks its 4th anniversary this year, Nepes exhibited 'JANUS', which has a mobile self-learning neural network processing unit (NPU) IP for object classification, and a distributed learning IP driving system. In particular, ‘Janus’ is a lightweight self-learning NPU IP-embedded artificial intelligence semiconductor developed to meet the needs of the market where the need for ‘on-device learning’ for optimal reconstruction (relearning) of artificial intelligence models in user development environments is emerging. This has a wide range of application fields, from intelligent automobile systems such as smart keys and driver monitoring systems through new user authentication to intelligent factory fields such as field learning systems to improve defect recognition rates.In April 2020, Nepes was selected as the lead organization for the ‘Development of mobile self-learning recursive neural network processor technology’ project in the ‘Next-generation intelligent semiconductor technology development project’ hosted by the Ministry of Science and ICT and is carrying out five years of research. This study aims to secure core technologies that enable lightweight semi-supervised learning and distributed learning by equipping devices with learning functions to optimize the privacy of personal and security data and the user environment. Many institutions, including Chungbuk National University, Hanyang University, and Seoul National University of Science and Technology, are collaborating. Based on its AI design technology, Nepes has not only secured on-device specialized AI semiconductor source technologies such as ‘mobile self-learning’ and ‘AI semiconductor lightweight’, but also developed on-device AI integrated platform technology.    ▲ AI Chip with built-in lightweight self-learning NPU IP“The on-device AI semiconductor market is blooming, and in particular, AI semiconductors that can learn at the device level have endless applications in our daily lives,” said Park Yeon-sook, head of Nepes. “The result of this project is the development of on-device AI technology.” “It will secure fundamental technology for advancement,” she said. In addition, Nepes is developing its own cutting-edge technologies, such as 'Development of chiplet heterogeneous integration ultra-high-performance artificial intelligence semiconductor' with a total project cost of KRW 44 billion hosted by the Ministry of Science and ICT, and 'Development of core materials and process technology for 3D IC manufacturing using FOWLP' hosted by the Ministry of Trade, Industry and Energy. Based on packaging manufacturing technology, we are carrying out various national projects to develop core technologies for system semiconductor and AI semiconductor packaging.

Advanced semiconductor packaging foundry specialist Nepes announced on the 9th at the 'World-Class Product Certification award Ceremony’ held at the Grand InterContinental Seoul Parnas, that their advanced packaging technology, Wafer Level Package (WLP), has been selected as a 'Current World-Class Product.'▲Nepes' WLP certified as '2023 Current World-Class Product' by the Ministry of Trade, Industry and Energy (Photo = Nepes) World-Class Products are distinguished annually by the Ministry of Trade, Industry and Energy and operated by the Korea Trade-Investment Promotion Agency (KOTRA), divided into 'Current World Class Products' and 'Next Generation World Class Products' to lead the global market, enhance corporate competitiveness, and contribute to export vitality. Nepes' Wafer Level Package was uniquely selected in the semiconductor sector as a 'Next Generation World Class Product' in 2016. Since then, it has renewed its certification, meeting conditions such as ranking within the top five in global market share and 5% or higher, along with an annual export scale of at least five million dollars, thereby newly elevating to the status of a 'Current World Class Product.' Wafer Level Packaging is an advanced packaging technology that performs bumping and Redistribution Layer (RDL) on fully processed wafers, differing from conventional packaging. Nepes successfully mass-produced advanced packaging applying bumping technology for the first time in Korea in 2000. Semiconductors utilizing this technology have significantly improved electrical characteristics due to shorter external connection wiring and also boast excellent heat dissipation properties, preventing overheating and effectively reducing production costs. Moreover, by forming solder bumps on the chip's I/O pads, replacing wires, it enables miniaturization and high integration, and is currently widely applied in mobile, PC, cameras, and more. Nepes has grown to become a core value chain in the domestic system semiconductor ecosystem based on commercializing advanced technologies such as Fan-out WLP and Fan-out Panel Level Package (FO-PLP), in a domestic market scarce of system semiconductor players. Currently, with global-level technology and manufacturing competitiveness, Nepes is attracting prominent overseas customers to Korea, expanding and sophisticating advanced foundry infrastructure. At the event, Lee Sang-min, manager of Nepes' management planning team, who received the certification, expressed, "It is very meaningful that Nepes' advanced packaging technology has been recognized for its excellence and marketability in the semiconductor industry and elevated to a 'Current World Class Product.' We will continue to strive to drive the ecosystem of system semiconductors in Korea and sustain our growth."  Additionally, Nepes presented a successful case study in the medium-sized enterprise category at the ceremony.

Nepes participate in the UCIe(Universal Chiplet Interconnect Express) consortium launched to establish an industry standard for ‘Next-generation chip packaging technology’.Semiconductor companies such as ▲AMD ▲Arm ▲Qualcomm ▲ASE, including TSMC and Intel, and IT companies such as ▲Google Cloud ▲Meta ▲Microsoft also participated in the consortium.The consortium aims to establish UCIe as a new connectivity standard such as PCIe, USB, NVMe, etc.Members will soon begin working on the creation of the next-generation UCIe technology standard, including the chiplet form factor, management, enhanced security and other essential protocol definitions after the UCIe 1.0 specification is drafted.If the UCIe standard is established, it is compatible with other companies' chiplet structures. This can lead to cost savings and faster time to market.

“Heterogeneous integration,” a hot keyword in the global semiconductor marketNepes’s fan-out technology-applied “nSiP” & “nPoP” are the alternativesThe global semiconductor industry started to focus on the back-end process. As Moore’s law, which states that the semiconductor density doubles every two years, is no longer valid, and miniaturization of circuits in the front-end process is reaching its limit, the industry players are looking for alternatives. Among the alternatives, the “Heterogeneous Integration Packaging,” also referred to as a 2D and 3D packaging has been gaining attentions as the next-generation technology. It attaches chips in series and integrates them to a single semiconductor piece. On July 7th,Nepes introduced its unique technology “nSiP’ and “nPoP” along with the trends of the next-generation heterogeneous integration packaging at “Semiconductor Packaging Day 2022” held by Electronics Times, a Korean IT news media.Nepes is an advanced semiconductor packaging company that supplies the Wafer Level Packaging(WLP), Fan-Out Panel Level Packaging(FOPLP) and more.It is a pioneer in the back-end process as it commercialized the FOPLP technology for 600x600mm square panels, not round panels, for the first time in the world in May 2017.System in Package(SiP) introduced by Nepes at the conference, is a heterogeneous integration packaging technology with various functions put into a single chip. Nepes’s unique technology “nSiP” does not contain components such as substrates, reducing the packaging size to one third and shortening the signal transmission distance by 30% for performance improvement. Nepes produced its first commercialized nSiP in January. Package on Package(PoP) is a technology that adds a layer of package with a different function on top of another package. This technology minimizes heat generation from the chips and lowers the packaging thickness by 26% compared to competitors’ products. Mass production is scheduled to be in 4Q, 2023.Nepes’s unique packaging technologies are based on the Fan-Out technology that utilizes the Re-Distribution Layer(RDL). In the Fan-Out technology, the input/output terminals are located outside the chips to fit in a higher number of terminals. It is expected to be the solution for the ultra-high-performance and high-integration packaging market since it can be used to layer or expand different sizes of chips as well as to improve the electrical properties and thermal efficiency, In the meantime, the global packaging market size is expected to be driven by the SiP, Fan-Out, and PoP technologies and reach a $9.6 billion scale by 2026 according Yole, a market analysis firm. The PoP’s market share is expected to increase particularly high from 5% to 11%. Read more: https://www.digitaljournal.com/pr/nepes-integrates-packaging-with-advanced-fan-out-technology#ixzz7aC8RY0hV

[Semiconductor Packaging Day 2022] Nepes expands the application area of FO-PLP. Nepes will expand its mass-production products using fan-out-panel level packages (FO-PLP), one of the most advanced packaging technologies. Following the Power Management Integrated Circuit (PMIC), market will be expanded with codec chips and application processors (AP). It will also respond to demand for next-generation packing markets such as system-inpackage (SiP) and 2.5 and 3D utilizes Nepes' advanced fan-out (FO) technology.   During the “Semiconductor Packaging Day 2022”, Kim Jong-heon, Nepes' Corporate CTO of Semiconductor Business (Executive Vice President), said in “We are increasing applications such as codecs after last year’s mass-production of the world’s first PMIC with FO-PLP", “We will mass-produce AP, and APU, which combines AP and GPU, as FO-PLP in the future.,” he addedFO-PLP is a technique that packages square panels rather than round warfers. Nepes has a mass production technology of 600mm panels in width and height. It is considered a next-generation technology that can increase production speed by more than five times compared to packaging on a typical 12-inch wafer. Nepes have been supplying PMIC of global semiconductor companies with FO-PLP since the fourth quarter of last year. For the first time in the industry, Nepes has invested hundreds of billions won in building FO-PLP mass production facilities. Nepes have also begun the mass production of codec chips as well as PMIC. It is known that other chips, such as AP, are currently being discussed with customers for the mass production of FO-PLP. The specific customer company is not disclosed. Vice President Kim said, “In addition to single-chip FO-PLP, there are many more products when considering the packaging of two or more chips. The expansion of the FO-PLP market is as expected. Nepes will also be launching its next-generation packaging market. Typical examples are 2.5D and 3D packaging, and 3D package-on-package (PoP) technology. PoP is a technology that stacked packages which function differently from packages. Nepes developed an ultra-thin PoP with minimal heat and reduced package thickness and passed the technical qualification. Vice President Kim explained that the packaging thickness can be reduced up to 26% compared to his competitors. SiP without substrates is also a field that Nepes focuses on.  It introduced its first mass-production product earlier this year with SiP that utilizes Nepes' own RDL technologies. It reduces the size to one-third of the existing package and shortens the signal transmission distance by 30%. Nepes is also developing a 3D stacking technology that vertically stacked semiconductors. Nepes' entry into the next-generation packaging market is based on its excellent fan-out technology. Fan-out is a technology that increases the number of I/Os by placing semiconductor input and output terminals (I/O) outside of the chip and can exchange more signals. Vice President Kim said, “Nepes possesses a wide range of advanced packaging technologies to provide packaging solutions that are ahead of their time.”he also said “We plan to play a role as a high-tech back-end foundry rather than a simple back-end process.” 

Nepes joins the American Semiconductor Innovation Coalition (ASIC) to Strengthen Global Semiconductor CooperationNepes, led by Chairman Lee Byung-Koo,  has announced its participation in the American Semiconductor Innovation Coalition (ASIC) to help strengthen global semiconductor cooperation. As members of ASIC, Nepes will contribute to developing a strong proposal for a technical agenda in advanced packaging. ASIC is a coalition of more than 75 businesses, startups, universities, national labs, and nonprofits dedicated to bringing the best research and development to the National Semiconductor Technology Center (NSTC) and the National Advanced Packaging Manufacturing Program (NAPMP). It aims to strengthen the diverse and competitive semiconductor workforce, make bold investments in semiconductor R&D, and academic infrastructure needed to deliver semiconductor innovation, prototyping and manufacturing in the United States. Dr. Douglas Grose, who is leading ASIC, said, “ASIC is focused on working collaboratively to develop new strategies and solutions for the U.S. semiconductor industry, and that includes partnerships with international organizations. We’re very pleased to have Nepes join ASIC and provide their expertise on advanced packaging, which is increasingly critical to the semiconductor industry both in the U.S. and worldwide.”  ASIC member companies include key companies in the semiconductor field in Korea, the US, Europe, and Japan. As OSAT companies, i3 Microsystems of the US and Nepes of Korea are participating.“As the importance and role of advanced packaging technology continues to grow, ASIC enables Nepes to further strengthen cooperation with leading global member companies,” said Kim Tae-hoon, president at Nepes. “It has given us an opportunity to raise the status of Korean companies’ advanced packaging technology and contribute to the development of the advanced back-end industry and the global semiconductor ecosystem.”

Nepes promotes new packaging technology at an international conferenceThe packaging provider introduces ‘nPLP’, a next-generation packaging solution The company also presents FOWLP-based antenna-in-package technology on the 3rd of this month Nepes presented at the 2022 Electronic Components and Technology Conference (ECTC), which took place in San Diego from May 31 to June 3 (PDT), to showcase its cutting-edge semiconductor packaging technology.Organized by IEEE Electronics Packaging Society, the conference is an international event attended by experts in the fields of electronic components and materials, packaging, and IoT to share their visions about future technology and discuss methods of cooperation. This year marks the 72nd iteration of ECTC. The 2022 ECTC brings together 106 corporations from 24 countries, including Nepes, Samsung Electronics, TSMC, and Amkor Technology. This year, Nepes became the world’s first company to successfully mass-produce its nPLP solution. An improvement over the previous 300-mm round FOWLP, nPLP is a next-generation packaging solution in which a fan-out package is implemented onto a 600-by-600-mm large-size square panel. Lewis Kang, the Managing Director of the Future Technology Planning Division gave a talk titled “FOWLP-based antenna in package (FO-AiP) using 5G mmWave) on June 3, the last day of the event. Kang introduced the antenna-in-package technology, which can reduce signal loss in 5G smartphone communication antennae using Nepes’ noteworthy fan-out technology.  “We promoted Nepes’ unique PLP and AiP technology for 5G use at the international ECTC conference, which is attended by semiconductor experts from all over the world alongside possible clients,” said Kang. “We paved the way for future discussions regarding new business developments with possible global, top-tier clientele attending the conference.”

Nepes, which eliminated semiconductor leadframe, “semiconductor packaging efficiency 10 times… Achieved 1 trillion won in sales within 3 years”Semiconductor manufacturing is divided into a ‘pre-process’, in which a circuit is engraved on thin silicon to manufacture a chip, and a ‘post-process’, in which the manufactured chip is packaged (packaging) using a substrate and metal wire. Nepes a company specializing in semiconductor backend-processing, recently started produce the 'Fan-out panel level packaing'(FOPLP) that packaged high-performance semiconductors with a thickness of 0.9nm and works in the form of a square panel(600mm) It is the only technology in the world that increases the net die (the number of chips per wafer or panel) more than tenfold from 1,000 to 10,000. Since there is no wasted area on the edge of the circular wafer, productivity is also greatly improved. Lee Byung-koo (pictured), chairman of Nepes, said, “We are pushing the semiconductor packaging technology to the limit through FOPLP and others." Nepes, a listed company on the KOSDAQ, is a cutting-edge company in the packaging field. They mainly receive chips from Samsung Electronics, etc., and package them to complete semiconductors. It has the capacity to process 1104,000 wafers per year. Sales are 65% export and 35% domastic. Last year, it recorded 418.4 billion won in sales and 16.4 billion won in operating loss. Nepes has been developing a technology for packaging chips to be light, thin and short (light, thin, short and small) so that semiconductors can be put into smartphones and IoTs. In the past, semiconductors were shaped like a black centipede. Its size was much larger than the chip. This is because the chip was placed on the board, a connection part similar to a centipede was made using a copper wire, etc., and then an epoxy resin was placed on it to fix it. Due to its complex structure, the heat problem was also serious. In contrast, the semiconductors packaged by Nepes do not change significantly in the size of a square chip. This is because they developed 'Wafer Level Packaging (WLP)' technology in the 2000s, which coats a thin metal film just below the chip, prints a circuit diagram with a laser, and sends and receives electrical signals using fine metal protrusions. The thickness of the finished semiconductor was only 0.4 nm. Overseas semiconductor manufacturers that have recognized Nepes' technology have sent their chips by air to request packaging. Nepes, which eliminated semiconductor centipedes, “semiconductor packaging efficiency 10 times… Achieved 1 trillion won in sales within 3 years” Nepes spares no expense in R&D and facility investment to maintain cutting-edge technology. Last year, an additional 42,962㎡ factory site was prepared in Goesan, North Chungcheong Province, and advanced packaging facilities such as WLP and FOPLP were installed. Last year's operating loss is related to such facility investment.  Nepes' earnings are expected to improve significantly this year. This is because the total production capacity will increase by about 60% when the FOPLP facility starts operation. The securities industry predicts that Nepes will record 606 billion won in sales and 52 billion won in operating profit this year. This is almost twice as much sales as in 2020 (343.6 billion won).

Nepes won the ESG Management CEO Grand Prize (Corporate Governance Sector) at the ‘2021 ESG Management Awards Ceremony and Best Case Presentation’ held at the National Assembly Hall conference room on December 15th.This event was co-hosted by the Office of National Assembly member Joo-Young Kim and the Audit and Sharing Research Institute, and was prepared to further vitalize and encourage ESG management, which is indispensable in corporate activities.The organizer selected the ESG management target awardees based on the company's sustainability report, and included 9 environmental indicators such as general energy consumption, renewable energy consumption, and greenhouse gas emissions, and 12 other environmental indicators including employee safety, win-win growth support for business partners, and support for local communities. Each of the nine governance indicators, such as social indicators, management performance evaluation and compensation, identification of stakeholder ESG needs, and participation in global partnerships, was scored and evaluated. Nepes Chairman Lee Byung-koo was selected as the best CEO in the corporate governance sector and received this award.

Nepes Laweh corporation announced the successful production qualification and ramp-up of the world’s first 600mm x 600mm large panel manufacturing line using Deca’s M-Series™ fan-out technologies.   Nepes Laweh held the completion ceremony of the Cheongan Campus PLP Line on December 7th with the presence of Minister of Trade, Industry and Energy, Governor of Chungcheongbuk-do, and representatives of customers and partners. The company announced that the FOPLP line completed customer certification in the third quarter and secured a stable yield and entered full-scale mass production.   The PLP fab, which held the completion ceremony this time, was the first fab built on the 186,000㎡ Cheongan Campus site with 25 soccer fields, and was a total building area of 34,000㎡. This is a level that can produce up to 96,000 panels per year based on 600mm PLP. Based on this next-generation manufacturing line, Nepes is evaluated to be able to provide high-density packaging solutions required for advanced system semiconductors for each application, such as smartphones, automobiles, and IoT, according to customer needs. "FOPLP is the best packaging solution for high-end semiconductors as a result of long cooperation with global partners such as materials, parts, and equipment," said Chilhee Chung, Chairman of Nepes and GM of Semiconductor Business   “We’re pleased to be working with nepes to bring the industry’s largest format 600mm square panel to volume production” commented Tim Olson, CEO of Deca. “With initial production focused on single and multi-die packages for leading Smartphone producers, the future is heterogenous integration of chiplets using Deca’s Gen 2 technology.  A recent customer application with 10 embedded chiplets was designed into a 36mm x 36mm package.  Such a large device is limited to 73% maximum utilization on 300mm round format due to edge losses.  On 600mm, the utilization jumps to 92% delivering greater than 25% cost reduction on area utilization alone.”    About Nepes Laweh www.nepes.co.kr Nepes Laweh is leading company in the system semiconductor industry with advanced fan-out packaging solution. In the era of the 4th industrial revolution, when semiconductors are refined and advanced, such as 5G, self-driving cars, and smartphones, we are presenting new standards for fan-out packages based on nPLP™ technology using 600mm large square panels.   About Deca Technologies www.ThinkDeca.com   Deca is a leading provider of advanced packaging technology to the semiconductor industry with M-Series™ fan-out and Adaptive Patterning® real-time design-during-manufacturing. A growing list of industry leaders have completed technology transfer and license agreements for access to Deca’s proven structures, processes, materials, equipment, design systems and know-how.  Starting with the highest quality and reliability in Gen 1 aimed at Smartphone applications to the growth of Gen 2 for chiplets and heterogeneous integration, Deca’s technologies are emerging as key industry standards for the future.

- Stable yield achievement of 600mm FOPLP Fab at Cheongan Campus ... Mass production ramp-up - The world's first large-panel packaging process enabling significant productivity improvement and more accessibility to 'advanced technology'   Nepes Laweh announced that it will more than double its capacity next year as it begins mass production of FOPLP, the next-generation packaging process.   Nepes Laweh held the completion ceremony of the Cheongan Campus PLP fab on December 7th with the presence of Minister of Trade, Industry and Energy, Governor of Chungcheongbuk-do, and representatives from customers and partners. The company announced that the FOPLP manufacture line completed customer certification in the third quarter and achieved a stable yield and started full-scale mass production and plans to more than double its capacity next year aligned with strong customer demand.   The PLP Fab, where the completion ceremony was held, was the first fab built on the 186,000㎡ Cheongan Campus site which is the size of 25 soccer fields: with a total building area of 34,000㎡. The fab can produce up to 96,000 panels per year based on 600mm PLP.   Based on this next-generation packaging line, nepes would receive a favorable evaluation about her ability to provide high-density packaging solutions required for Non-memory semiconductors for each application, such as smartphones, automobiles, and IoT, aligned with customer needs. "FOPLP is the best packaging solution for high-end semiconductors as a result of long cooperation with global partners such as materials, parts, and equipment," said Chilhee Chung, Chairman of Nepes and GM of Semiconductor Business   According to the industry, nepes laweh's FOPLP is a large square panel with a size of 600mm by 600mm, and it is analyzed that productivity has greatly improved compared to the 300mm round FOWLP. In particular, the fan-out technology applied to Nepes Laweh’s FOPLP has been proven to have high stability compared to existing technologies.   As demand increases mainly from advanced semiconductor manufacturers in the future, its market share is expected to significantly increase in the overall packaging market.   About Nepes Laweh Nepes Laweh is leading company in the system semiconductor industry with advanced fan-out packaging solution. In the era of the 4th industrial revolution, when semiconductors are refined and advanced, such as 5G, self-driving cars, and smartphones, we are presenting new standards for fan-out packages based on nPLP™ technology using 600mm large square panels.    

-nepes announced substrate-less SiP(System in Package) in the Electronic Components and Technology Conference(ECTC)-The industry is giving attention to nepes SiP as an alternative solution for the PCB replacement… Reliability test completed Recently, due to an unprecedented PCB shortage used for semiconductor packaging, the market is interested in SiP solutions based on FOWLP and FOPLP technologies. Nepes, the advanced back-end foundry, promoted substrate-less SiP technology through ECTC and started to target the market. 'nSiP (nepes System in Package)', unveiled by Nepes, is a leading-edge technology of the system semiconductor packaging roadmap. nSiP is based on ‘End-fab’ technology without substrate and wire bonding and is the most optimized packaging solution for high performance, high density, and small form factor. Also, nSiP is deployed with redistribution layers on a chip instead of PCBs. It allows to reduce the overall size of IC by 30 percent, the thickness by around 60 percent, and the development period by more than 50 percent. The company recently released sample products of packaging to customers across the globe. While semiconductor manufacturers are having difficulties in launching and developing products due to a shortage of substrate and PCB supply, nepes is about to mass-produce FOPLP based on the End-fab technology. “The PLP and nSiP could meet growing demand for high-performing chips and components by providing a new solution for the need” said Kim Tae-hoon, President Corporate Marketing at Nepes. “It will also help relieve the chronic shortage of substrate in semiconductor industry,” he said.

nepes will participate in the Electronic Components and Technology Conference(ECTC) held online from June 1 to July 4, 2021 and introduce advanced packaging technology based on 'End-fab' technology.ECTC, which marks its 71st anniversary this year, is a worldwide prestigious event in the fields of packaging, electronic components and technology education, and is a place for cooperation and technology exchange in which 106 global semiconductor companies participate.▲nepes Virtual Conference in ECTC▲In-Soo Kang, Head of Future Technology Planning Division, introducing nSiP solutions in the 2021 ECTC Technical Programnepes participated in this event as a conference sponsor and participated in 'nSiP (nepes' System in Package) Platform for Various Module Packaging Applications' (Kang In-soo, Kim Jong-heon, Lee Jun-gyu, Shin Won-sun, Kim Nam-cheol, Park Sang-yong) and 600mm FOPLP as a Scale Up Alternative to 300mm FOWLP With 6-Sided Die Protection' (Jacinta Aman Lim, Park Yoon-mook, Edil De Vera, Kim Byeong-cheol, Brett Dunlap ) will release a presentation video.Event information: https://www.ectc.net■Presentation video  'nSiP(System in Package) Platform for Various Module Packaging Applications' :  https://youtu.be/-i0k_kHHGJU'600mm FOPLP as a Scale Up Alternative to 300mm FOWLP With 6-Sided Die Protection' : https://youtu.be/zskiFK--8gQ■BrochurenSiP : https://url.kr/1yfwnenPLP : https://url.kr/6plyox

「基板なし」が主流に  一方で、基板不足の影響を受けていないパッケ?ジ? 門メ?カ?もある。  韓?のネぺスは、基板を使わずにウエハ??態のまま で最終工程まで?理できる技術を持つ。ネペスは今年１ 月、この「ウエハ?レベルパッケ?ジ」技術を生かし て、ＣＰＵやメモリ?など複?のチップを?一のパッケ ?ジに形成してシステム化を?現する「システム?イ ン?パッケ?ジ」技術を公開した。基板とワイヤを用い る??方法に比べ、??面積を３分の１以下に縮小でき るメリットがあるという。  システム?イン?パッケ?ジ技術は、複?個の集積回 路（ＩＣ）またはパッケ?ジを積層することで、メモリ ?の大容量化や機能の複合化を?現する??技術。現在 は、スマホの主要部品の 73％がシステム?イン?パッケ ?ジで構成されているが、そのうちの９割は基板やワイ ヤを使った??方式のため、同技術の伸びしろは大き い。  (the rest omitted)"No board" is the mainstream.There is a package maker where have not been affected by the shortage of substrates.Nepes in Korea has the technology to process from wafer to packaging without using a substrate.In January of this year, Nepes unveiled the "System in Package" technology  by using  "Wafer Level Package" technology."System in Package" technology forms a single package of multiple chips such as CPU and memory and realizes systematization.It has the advantage of reducing the mounting area by less than one-third compared to the conventional method using a substrate and wire.(the rest omitted)[Source = Japan, The Daily NNA    https://bit.ly/3eF8QzM]

By Kim Bo-eunNepes, a leading firm in packaging and test services for semiconductors, have racked up a series a firsts in the parts and materials industry.It became the first local company to commercialize fan-out wafer level packaging and also became the world's first company to commercialize panel-level packaging. In addition, it is the first in the industry to mass produce neuromorphic chips used to model the human brain.(the rest omitted)[Source = The Korea Times   http://www.koreatimes.co.kr/www/tech/2021/03/129_305102.html]

Eyes are on local SMEs manufacturing high-tech materials, components and equipment amid expectations of a super cycle for semiconductors this year and scaled-up government support.The semiconductor equipment market is expected to grow to $71.9 billion in 2021, up 4.3 percent from $68.9 billion in 2020. The market is forecast to grow to 76.1 billion in 2022.(omitted)NepesAlso among promising players is Nepes, a leading outsourced semiconductor assembly and test (OSAT) firm.OSATs offer third-party packaging and test services for semiconductor firms. They package silicon devices that are made by foundries and test devices prior to shipping them to the market. Their role comes in the end stage of semiconductor manufacturing process after the wafer fabrication and wafer probe stages.(the rest omitted)[Source=The Korea Times https://www.koreatimes.co.kr/www/tech/2021/01/129_302020.html]

Upgrade business competitiveness to the next level with high reliability fan-out packaging technology Nepes(KOSDAQ: 033640), one of the top tier advanced packaging service providers, licenses advanced packaging technology from Deca Technologies and take over semiconductor packaging line. Nepes announced on 1st Oct., they have decided to license the advanced packaging technology M-Series and take over the semiconductor advanced packaging fab from Deca Technologies. Nepes will acquire Deca's wafer level chip scale production line including Fan-out wafer-level packaging(FOWLP) in support of active customers as well as enter into a technology license agreement. FOWLP is an innovative back-end technology in semiconductor manufacturing as the evolution of wafer fab technology is currently slowing down. The FOWLP is applied to advanced semiconductors enabling high integration and superior thermal dissipation characteristics and is a fast growing market with revenues expected at around $3B in 2025. FOWLP market has a high entry barrier. There are only 4 OSAT(Outsourced Semiconductor Assembly and Test) companies with FOWLP mass production ability globally including Nepes. Nepes with plans to gain 10% of the market share within 5 years of this acquisition. Nepes is currently strengthening its portfolio to gain leadership in logic chip packaging market. In particular, Deca's FOWLP technology(M-Series™) provides high reliability, ideal for mobile chipsets with enhanced chip protection and stability. Nepes said, "This technology including M-Series™ and Adaptive Patterning™ will create strong synergy with Nepes own Panel Level Packaging(PLP) and FOWLP technology growing our leadership in advanced packaging by actively expanding Korea's ecosystem development strategy for the logic chip industry." ----------------------About NepesFounded in 1990, Nepes is a packaging solution provider in system IC. Started with chemical business, acquired US patent for solder bumping technology for semiconductors in 2004. Nepes commercialized for the first time in Korea, Plating bumping, WLP(Wafer level packaging), FOWLP(Fan-out Wafer level packaging) and PLP(Panel level packaging) technology. Providing FOWLP service to global No.1 Automotive chip maker since 2015 and enhancing PLP service leadership in global OSAT market.

SEOUL, Korea July 12, 2015 As a leading Korean semiconductor wafer level packaging solutions provider, nepes has been shipping automotive components packaged by FOWLP in HVM (High Volume Manufacturing) mode in accordance with German automotive makers'qualifications. nepes is gearing up for mobile RF products with an ultra-thin profile range of 200~300 μm. nepes has a proprietary feature of an embedded Cu plane inside their FOWLP as an option enabling thin profiles of less than 300 μm and possibly serving as the critical element enhancing electrical and thermal performance.nepes has been focusing on Fan-Out Wafer Level Packages (FOWLP) since 2009, offering advanced packaging solutions based on wafer level platforms, rather than conventional packaging. A big potential of Fan-Out Packaging has recently been recognized by the industry. "nepes is driving ourselves to provide value-added solutions to customers through Fan-Out WLP (Wafer Level Package) in terms of high performance, small form factor, and more importantly, integration. nepes will not overlook the cost effectiveness as Fan-Out WLP will have to compete with plastic packages like QFN, FCBGA, WLP and wire bond, and bumped types of System in Packaging (SiP)," according to nepes.nepes also successfully introduced its Via-Frame Fan-Out PKG (FOP) on a 300mm panel platform, which enables the chip to be face-up for biometric sensor applications and multipackage stack solutions.Furthermore, with capability of multiple redistribution metal layers up to 4, multiple dies embedded with dozens of passive components are integrated into a single FOWLP. This offers the simplicity of the system board design for system makers. It also allows fast development and time to market to customers where not only mobile, but also IoT, smart and electric car, and medical applications are perfectly matched. It is being commercialized now and the production information will be available soon.

MessageThank You & Happy New Year !!!My superstar,First of all, I'd like to say thank you very much for our last year's achievement in the face of new year like sun rising.Last year, we made outstanding growth on sales and finance. And also in spite of increasing uncertain and very rapid change of the business environment, we invested 62.4 billion won on the equipment and 9.4 billion on R&D and created new employment of 308 people for sustainable growth.Meanwhile, to realize the one of our company's mission, "The ends of the earth, contributing to regional development with providing products and services", we are building the LED manufacturing plant in Russia as well as built the semiconductor plant in Singapore.In addition, we boosted significantly brand awareness of nepes, for example, we won as a sustainable growth corporate by ministry of knowledge economy, national R&D project and consortium HRD ability magnified program.Such performance was achieved with all of our fruits with patience, passion and sweat.n family!Our business goals of this year are more than 60% of actual growth, through investment of 74 billion won on equipment, 11.7 biliion won on R&D, creation of new 500 jobs and also building a dormitory with a day care child center. We have hope, dream and Vision which are the highest gain of corporate value and individual growth.My superstar!!To achieve our business goal through making the unprecedented business environment this year steppingstone, I'd like to share new year's management policy focusing nepes 3 mission.First, weneed to realize quantum leap.This year, we will obtain the order from market and customer with accumulated technology. Quantum leap is not about knowledge and technology but about carrying out the full the belief and confidence.Under the demand and chance by global big customers, let's respond to their demand and supply enough through the quality of growth which is innovatively increasing productivity of labor and capital.My superstar!!The year will be the highest gain by accumulated technology of nepes.Don't be afraid of environment like financial crisis and global economic recession.Have a self-confidence,Think simply and clearly,Take a speedy actionLet's make the nepes's community which has the practical power to share the fruit of a seed.Second, we should still more advance to globalization.We plan to acquire a high-tech semiconductor plant in Japan and build LED manufacturing and semiconductor plant in china, followed by semiconductor plant in Singapore and LED manufacturing plant in Russia this year.Above all, it is first case that the Korean company operates the highly advanced semiconductor plant in Japan so would be risky with opportunity. But to realize one or our mission "The ends of the earth, contributing to regional development with providing products and services", we will challenge with no the difficult environment but the bright opportunity. On the other hand, many global companies are struggling in china market, but we'd like to also advance into china market withindomitablewillpowerDear N family!!!Through this globalization, we need to expand our mind, thinking and our life of boundary as well as business boundary more broadly, deeply and highly. So let's become a global leader respecting diversity and difference.Third, We should keep building the healthy financial structure.To sustain the growth, the company should keep maintaining the healthy financial structure through the business restructuring. Even though some of relatively new subsidiaries haven't fixed their target market, they have to realize the financial innovation to make profit on their income statement within Q2. Relatively smaller subsidiaries should make internal and external collaboration to double their scale of business and obtain the solid business structure.Dear N family!!Let's block out the grasshopper complex which means avoiding new challenge and the complacent about the unchangeable mind. Let's make strong business infrastructures through filling up the crevasse between the ideal and the actual target by the self-perception as superstars, together.Finally, we shouldspread the internal positive psychological capitalTo achieve the business plan through realizing above mission statement, we should spread thepositive psychological capitalas a company's forth capital. Obtaining the positive psychological capital is one of the driving forces to achieve the higher performance and the inimitable competitiveness source. In the other words, we have to have the solid team sprit which can let drive ourselves to the target together, based onthe trust of each internal men power. These make us be able to use the environment of uncertainty and fast-paced business, as a business opportunity.Today, I am announcing the Team Sprit 3.7.3which will be based on the internal trust, communication and collaboration as a this year's organizational culture and acting up nepes's company life principles, in this year.Dear, n familyFirst, TeachingTeaching and spreading over three knowledge and wisdom.Second, keeping on writing a gratitude journalKeeping on writing seven gratitude a day on my journal for myself and my family.Third, enjoying gladding to achieveEnjoying three times a day of joy by playing a leading role of the business.Let's make 3.7.3 movement of life, reborn as a high-class talented person and a masterpiece company and leading the many companies, as a helmsman in the industry.My superstarWe put our mind to pray earnestly for nepes which experiences of gratitude and joy with anointing of God with great grace everyday who helps in the time on all of us in the home and workplace of nepes, this year again.

Superstar!Dear members of NEPES!The first morning of Jeonghae Year, the year of the golden pig, said to come once every 600 years, has dawned. Greeting the New Year full of hope and expectation, I hope that all of the executives and workers and your homes are blessed with health and happiness.Looking back at the last year, the company achieved growth of over 30 percent, despite many difficulties. In addition, the company developed new products such as functional chemicals, Biotechnologies and coatings, which will become our future driving force. We operated our factory in Singapore, established new visions and have steadily practiced T-management based on the accomplishment of our goals and managerial ideologies. In 2006, NEPES won the Silver Tower industrial medal granted to the best performing venture businesses, a first for a component material maker.I want to thank all the executives and employees for these favorable results in 2006. Without your devoted efforts, NEPES could not have achieved its present status. And similarly, if you had not recognized, trusted and believed in me, I couldn't have been an effective CEO. I especially want to offer my heartfelt gratitude to all members of NEPES, who have worked passionately, if invisibly, with a strong sense of duty and an unyielding spirit.For us, the year 2007 is very important in that we will be preparing a stepping stone from which we can accomplish our vision of `` an organization advancing the future.'' However, we expect to continuously be faced with a number of obstacles that will hinder our growth in the coming year. So many obstacles will be waiting for us. The value of our currency is soaring, our customers are continuously pushing forward vertical integration, an increasing number of competitors are emerging, and the political atmosphere is unstable due to North Korea's nuclear weapon programs and the presidential election. To wisely overcome these difficult managerial conditions, and to continuously develop by using them as opportunities to grow, I am going to select the following as my key words for management in 2007.First: self-innovation or creative innovation.To be able to take the shocks that are coming up as an opportunity, it is important for us to lighten our bodies. By utilizing indexes such as ROA and ROI, we should maximize the efficiency of the operation of our resources, such as investment, inventory, costs and manpower, and enhance our competitive edge through innovating in the non-cost aspects of competition.In addition, by introducing and making use of the 6 sigma method to improve our capacity to cope with the changes in business environment, we will more practically build a risk management system, steadily secure the future driving forces and daringly push them forward. To this end, we will expand new business which can generate synergies with existing ones in multiple ways, and advance the business structure by securing more than three new products for each business in preparation for the future through expanding applications based on already introduced new products and our technologies.Second, expansion of the culture of execution-oriented Culture.Even if we have broad knowledge, it is dead knowledge if we don't practice it. For creative innovation, all members should be able to speak to each other frankly regarding obstacles by joining the work sites, actively setting up plans and preparing solutions together. We should become really creative members of NEPES, who always have a critical mind that asks ``Why?'' more than three times, and make new things after digging deeply into the essence of our duties. To spread the culture of execution-oriented Culture, it is necessary for us to understand management and the purpose of driven life. Even those with high abilities and special passions may experience negative changes to their entire life if they have the wrong way of thinking in terms of being considerate of others. We know this too well. As good reasons give birth to good results, all members will realize the real value and meaning of the life only when they make the utmost effort to produce good results.Leaders of new business organizations, in particular, should know that they can get help from the people who surround them only when they do their best sacrificing themselves. Only through experience and knowledge, obtain at the work sites in the process of working hard, can they have a sense of confidence and feel happiness and satisfaction.Third, expansion of global talent.This year, we plan to step up education to prepare for the future by building middle managers into global talents through strengthening their capacities. For this purpose, we will supplement our systems of evaluation and education, and operate programs to cultivate core talents. We will then help executives and managers widen their personal relationships, and correctly understand members in and outside of the company, and the pool of human resources and the business as well. We will also practice T-management by stationing people in the appropriate position. Additionally, we will reform the personnel system according to the principle of T-management by reestablishing a transparent, fair and predictable evaluation and compensation system, slimming down the organization and building a self controlling organizational structure, in which every member of the company exactly knows his or her responsibilities and rights.To carry out the above-mentioned three keywords will bring us mental and material abundance, and will help us form more decent personalities and give us acute foresight. In addition, we will be able to find the values and meanings of life, and will feel the overwhelming growth we have achieved.Dear members of NEPES!We will have to try to attain the top competitive edge by further developing differentiation strategies that center around our current core capacities, and by strengthening our new driving forces through ceaseless efforts. This year, the company will daringly invest in R&D, education and informatization to expand production facilities and growth potential, and further strengthen marketing and R&D through expanding global networks. As well, we will certainly supplement various systems to perfect the T-management system. Finally, I pray to God so that all of your own hopes will be achieved, and your homes will be full of happiness and health.I'll serve you !!Thank you.Jan. 2, 2007Chairman Byung-gu, Lee

NEPES held a ceremony, ‘T-management declaration', on May 2, 2005, with B.K. Lee, CEO, the president of NEPES as the central figure, all members of local branches each division through video conference system.In this event, B.K. Lee said, in the workshop for directors was held on the end of March, we reconfirmed and have practiced our management philosophy, ‘Serving Life, Challenging Attitude, and Gratefulness', also, I think the current our business divisional management scheme has a limitation for leaping toward a global company and enforcing our competitiveness. So, to overcome this limitation, I introduced Collaborative management as a new management scheme and launched newly to reach our goal, ‘Organization that brings in the future'.Additionally, B.K. Lee emphasized on if all members of NEPES family share the meaning of our management philosophy and practice it with growing our competitiveness, NEPES could be a sound company, 2010.Dear Nepes Family Members!On 1 April, I announced the T-Management during the workshop held at Kunshan , China , which was organized for all the Directors from NEPES and all our overseas offices and affiliates. T-Management refers to accompanying, Collaborative Management . The present form of working alone or interacting only within the same department will have limitation in the growth of the company. We have to work hand in hand in order to overcome this limit and to achieve higher goal.NEPES family will constantly develop and overcome the limitation of growth when we try to closely understand what and how other departments work and extend our full support. T-Management is to think of others' problems as mine and extend our help to them. T-Management starts from the correct understanding of the company's identity i.e. management philosophy. Serving life is to satisfy not only customers and neighbors' needs and tastes but also endure hardship during the course of our work. In order to serve our customers at our best, we certainly need to grow. However, we cannot achieve our target all by ourselves. This is possible through T-Management. We have to develop our capability and competency in order to better our serving life. Everyone should not cease to take up the challenge to try new things with passion and develop one's expertise through education and training. This is the Challenging Attitude . However, it is very difficult to figure out where and how we should challenge in today's information overflow. To find that out, we must possess the insight and foresight and these abilities come only when we have a healthier mind. We must cultivate the habit of having a Gratefulness to be part of our life to have healthier mind.Dear NEPES Family! Expert opinions might vary but we can generally define our objective in life into 5 factors, namely Work, Training, Networking, Guidance, and Spiritual Life . Work forms the core part of our life, and an organization is required as there is a limitation to working alone. Training is necessary to enhance one's character and improve the quality of work and nothing is more important than networking to get the job done. Networking refers to forming a personal relationship and maintaining it. It is important to develop intimate relationships and genuine motive is required for that. In order to attain a true relationship, one must have the interest of the other party at all times and thus, open one's mind to different values and learn to accept mistakes made by others. Human beings are weak in nature and therefore have the tendency to choose the wrong path in life. We have to watch over others so that they do not take the wrong path. This is Guidance . Now, one can commit sins or lead a false life. One must have a strong mind in order not to commit sins to live an honest life. Spiritual Life plays an important role for one to have a strong mind so that he will not commit any sins and live an honest life. To achieve success in life, 5 factors just mentioned will have to balance among one another. We have to be able to think the way management philosophy is linked with objectives in life. Objectives in life will be attainable by practicing the management philosophy.Dear NEPES Family Members!In the New Year Message, I highlighted 『 Cost, Speed, New Things 』 as the keywords of Management for year 2006. These 3 keywords are the foundation of competitiveness. We will lose out in the competition if any one of them is missing. We have to devote all our efforts in securing cost competitiveness, speed competitiveness, and competitiveness for new things in order to survive in the competition and for continuous growth. Lastly, I would like to take this opportunity to highlight three strategies that we have to put into practice in the long term.First is the Creation of Product Value. Creating product value refers to innovation of values such as performance, design, and quality, and it also refers to Product Technology that can create new products that are suitable for this era and environmental changes, Production Technology that improves the quality yet lowers cost with zero defect technology, and it also refers to the reform of Sales Technology through cultivating marketing-oriented sales force by innovating productivity. In this age of limitless competition, speed is the key competitive edge. Speed means efficiency as well as productivity and we need to create awareness that it also equals money. We can only survive the competition when the productivity increment speed overtakes wage increment speed.Second is the Maturity of Human Value. This is about all the employees and executives, as a global talent, improve core quality and provide value to the organization in terms of job capability and commitment to work. They should nurture their characters with modesty, gratitude, honesty, and morality and also learn wisdom of life such as frontier mindset, Win-Win strategy, pre-accumulation post-thrust etc., and need to develop intangible assets such as brand, respect, trust and transparency as well.Third is the Creation of Advent Future. To achieve this, we will work towards building an organization with high performance, continuously pursue changes, and accumulate social capital such as Strategic Alliance, M&A, Outsourcing, and Networking and thus implement Strategic Management. With a mid-term goal set to 『 Rank in Top 100 Domestic Companies 』 by the year 2010 and a vision of 『 Organization that Advances the Future 』 , I am confident that we can fulfill our goals if we thrust forward with T-Management and execute the three strategies and management philosophy.Dear NEPES Family!NEPES will change company regulations, system, rule, and working method on a large scale according to the T-Management. We shall leave individualism and group egoism a history and try to break down the barrier between individuals and departments. Changes will lead us to some sacrifices, even sufferings but it will give one a sense of accomplishment that was worth to try. Let us change starting with myself, our department, and our divisions. Let us all move towards one direction with a challenging attitude and try not to be easily contented. Let us not forget this day, this moment. Let us remember this moment when we rejoice for achieving our goal. Let us march forward to a prosperous and aspiring future.Thank you.2 May, 2006Chairman, Lee Byung Koo