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NEWS
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Nepes' "Wafer Level Package" Selected as a 2023 World-Class Product
Advanced semiconductor packaging foundry specialist Nepes announced on the 9th at the 'World-Class Product Certification award Ceremony’ held at the Grand InterContinental Seoul Parnas, that their advanced packaging technology, Wafer Level Package (WLP), has been selected as a 'Current World-Class Product.'▲Nepes' WLP certified as '2023 Current World-Class Product' by the Ministry of Trade, Industry and Energy (Photo = Nepes) World-Class Products are distinguished annually by the Ministry of Trade, Industry and Energy and operated by the Korea Trade-Investment Promotion Agency (KOTRA), divided into 'Current World Class Products' and 'Next Generation World Class Products' to lead the global market, enhance corporate competitiveness, and contribute to export vitality. Nepes' Wafer Level Package was uniquely selected in the semiconductor sector as a 'Next Generation World Class Product' in 2016. Since then, it has renewed its certification, meeting conditions such as ranking within the top five in global market share and 5% or higher, along with an annual export scale of at least five million dollars, thereby newly elevating to the status of a 'Current World Class Product.' Wafer Level Packaging is an advanced packaging technology that performs bumping and Redistribution Layer (RDL) on fully processed wafers, differing from conventional packaging. Nepes successfully mass-produced advanced packaging applying bumping technology for the first time in Korea in 2000. Semiconductors utilizing this technology have significantly improved electrical characteristics due to shorter external connection wiring and also boast excellent heat dissipation properties, preventing overheating and effectively reducing production costs. Moreover, by forming solder bumps on the chip's I/O pads, replacing wires, it enables miniaturization and high integration, and is currently widely applied in mobile, PC, cameras, and more. Nepes has grown to become a core value chain in the domestic system semiconductor ecosystem based on commercializing advanced technologies such as Fan-out WLP and Fan-out Panel Level Package (FO-PLP), in a domestic market scarce of system semiconductor players. Currently, with global-level technology and manufacturing competitiveness, Nepes is attracting prominent overseas customers to Korea, expanding and sophisticating advanced foundry infrastructure. At the event, Lee Sang-min, manager of Nepes' management planning team, who received the certification, expressed, "It is very meaningful that Nepes' advanced packaging technology has been recognized for its excellence and marketability in the semiconductor industry and elevated to a 'Current World Class Product.' We will continue to strive to drive the ecosystem of system semiconductors in Korea and sustain our growth." Additionally, Nepes presented a successful case study in the medium-sized enterprise category at the ceremony.
2023-11-09 -
Nepes Captivates Attendees at '2023 TECH INSIDE SHOW' with Its nePAC Technology
The nePAC development team of Nepes participated in the [2023 TECH INSIDE SHOW], which took place from the 18th to the 20th at KINTEX. ▲An exhibit detailing the concept of nePAC (Photo = nePAC Product Technology Division) At the event, Nepes showcased their cutting-edge packaging platform, nePAC (nepes Package in Advanced CX solution), based on RDL interposer and Fan-Out technology. As their primary exhibition theme, the platform, which specializes in 2.5D & 3D packaging, garnered both intrigue and enthusiastic responses from industry professionals. ▲ A visitor at the Nepes booth listening to an explanation about nePAC. (Photo = nePAC Product Technology Division) Kim Hyo-Young, the team Leader in charge of the nePAC development team, who oversaw the participation in the exhibition, stated, "Visitors primarily asked many questions regarding the performance of nePAC technology and materials." He added, "This exhibition is the first for nePAC, and it provided a meaningful opportunity to broadly promote the technical expertise of Nepes."[The [2023 TECH INSIDE SHOW] is an event where South Korean companies, government entities, and organizations in the materials, components, equipment, and foundational industries participate. It serves to showcase the excellence of these industries in South Korea, promoting company products and technologies, and linking them to potential business opportunities.
2023-10-27 -
Nepes to Deliver a Lecture on "FO-RDL-Based 5G mmWave AiP Technology" at ISMP 2023
Nepes, represented by CEO Byung-Koo Lee, is set to participate in the International Symposium on Microelectronics and Packaging (ISMP) organized by the Korean Society for Microelectronics and Packaging (KMEPS) and deliver a lecture session. ISMP, now in its 21st edition, serves as a platform to explore the semiconductor packaging industry, share the latest technologies, and discuss strategies among various companies. Nepes, as the only domestic advanced packaging specialist, is returning to ISMP for the second time following its participation last year. In the "Package Design and Modeling2" session, Dr. Kang In-soo, the head of the semiconductor research institute, will present on the topic of "5G mmWave Antenna in Package based on Fan-out RDL Interposer Technology." The presentation will introduce Nepes' FO-AiP, highlighting its capabilities in reducing thickness and enhancing performance in antenna modules. The keynote speeches for the event will be delivered by Samsung Electronics and JCET. Additionally, attendees from 12 countries, including Korea, will explore the emerging trends in next-generation packaging technologies for industries such as artificial intelligence (AI), IoT, big data, and machine learning. ISMP 2023 will take place at the Paradise Hotel Busan from the 25th to the 27th of this month.[ISMP 2023 Home Page] ; https://www.ismp.or.kr/html/
2023-10-23 -
Nepes to Participate in 'SEDEX 2023,' Introducing Advanced Packaging Technology
Nepes, represented by CEO Byung-Koo Lee, will showcase its advanced packaging technology at the 25th Semiconductor Exhibition (SEDEX). SEDEX, celebrating its 25th anniversary this year, is the only specialized semiconductor exhibition in South Korea that encompasses all aspects of the semiconductor industry, including materials, components, and equipment. Nepes, along with industry leaders like SK Hynix and KEY FOUNDRY, will represent the semiconductor sector in Chungcheongbuk-do at the Chungbuk Joint Pavilion. At SEDEX 2023, Nepes plans to exhibit its core capabilities in advanced packaging technology, featuring 'nePACTM (Nepes Package in Advanced CX Solution)' and physical displays of 600mm FOPLP (Fan-Out Panel Level Packaging), as well as 300mm/200mm WLP (Wafer Level Packaging). They aim to introduce their advanced packaging technology, capable of reducing the thickness and enhancing the performance of semiconductors. SEDEX 2023 will feature the participation of around 250 domestic and international companies, including industry giants like Samsung Electronics and SK Hynix, occupying 800 booths. The event is scheduled to take place from the 25th to the 27th of this month at COEX in Samseong-dong, Seoul.[SEDEX 2023 Home page] ; https://sedex.org/public_html_eng/index.asp
2023-10-23 -
Nepes commercializes advanced FO-PLP technology replacing PI material, featured in Japanese Electron
The "Electronics Device Industry News" of Japan published a visit report on Nepes on October 19, 2023. The highlight of the report, which featured an interview with Nepes CEO, Byung-Koo Lee, was the industry's first commercialized MDxTM(Molded Direct) technology in collaboration with Deca Technologies. This tech bypasses the use of Polyimide(PI), an essential material for the FO(Fan-out) technique, and only employs the Molding method to achieve FO-PLP. This simplification of the process is anticipated to serve as an alternative to the QFN(Quad Flat No-lead) process. Nepes plans to undergo testing until the end of 2023 and kick off mass production in 2024. They are especially looking to broaden the application of this technology in semiconductors for automobiles and expand their business into the Japanese market. In 2021, Nepes was recognized as one of the global TOP 10 advanced packaging companies in a semiconductor supply chain report released by the White House in the USA. They play a pivotal role in the advanced packaging sector. CEO Lee Byung-goo stated, "By building partnerships with major global semiconductor companies and continuously developing technologies that cannot be addressed with our current processes, our goal is to become a top-tier advanced packaging company globally within the next five years."
2023-10-19 -
Nepes joins as a key partner for Samsung Electronics' Advanced Packaging (AVP) at the '2023 Advanced
Nepes, led by CEO Byung-Koo Lee, participated in the inaugural '2023 Advanced Semiconductor Packaging Show’ upon invitation from Samsung Electronics' AVP (Advanced PKG) business team. ▲ Kang In-soo, Executive Director, explaining Nepes' advanced packaging technology to the visitors. (Photo= Nepes) With the advanced semiconductor process facing significant costs and technical challenges, packaging technology to enhance chip performance is gaining attention. Last year, Samsung established an AVP (AdVanced Packaging) team to nurture advanced packaging and strengthen collaboration with technically capable partners. Having provided advanced packaging services since 2000, Nepes, as a core partner of Samsung, was invited to this exhibition, where they introduced their expertise through high-quality WLP processes, FOPLP, and the ultra-compact SiP, nePAC, captivating attendees' attention. Co-hosted by Suwon City and Gyeonggi Province, the '2023 Next-Generation Semiconductor Packaging Equipment and Materials Industry Exhibition', the first post-process specialized semiconductor exhibition in Korea, opened on the 30th and will run for three days at the Gyeonggi Suwon Convention Center, ending today(9/1).
2023-09-01 -
Nepes Laweh, World's First Commercialization of PI Alternative Packaging Technology
Leading advanced packaging company Nepes Laweh continues its innovation in advanced package technology, following the 600mm FOPLP (Fan-out Panel Level Package). Nepes Laweh announced that they have, for the first time in the world, implemented FOPLP solely through the Molding technique, without using the expensive Polyimide (PI), which is an essential material in the fan-out process.▲Implementation of FO-PLP using PI alternative packaging technology(Photo=Nepes) Based on Deca Technologies' M-Series™, this technology has been commercialized for the first time in the world by Nepes Laweh, and they have recently initiated product supplies to analog and automotive semiconductor company in the United States. This technology, which does not use PI, not only simplifies the process and improves productivity, but also has the potential to enhance product reliability. It is expected that this technology can extensively replace traditional conventional molding packages, such as QFN. In particular, analog semiconductor manufacturers, who frequently need to change and develop various products, can reduce the supply risk of materials like PCBs and lead frames. Additionally, it is a strong advantage that this technology allows for the transition to the fan-out process while maintaining existing semiconductor specifications, thus reducing the burden of new certifications for customers. Especially for products with large production volumes and stringent front-end customer certifications, such as automotive Microcontroller Units (MCU), the company expects this technology to offer advantages in manufacturing and quality control. A Nepes official conveyed, “The commercialization of fan-out molding technology is expected to further strengthen our technological competitiveness in the advanced package market.” Nepes Laweh has strategized to expand its customer base by applying fan-out PLP technology to various application products, including industrial and automotive products, starting with the supply of analog semiconductor samples.
2023-08-18 -
Nepes participated in the '2023 ECTC(Electronic Components and Technology Conference)'
Nepes participated in the 2023 ECTC (Electronic Components and Technology Conference) held in Orlando, Florida, USA from May 30th to June 2nd and introduced its advanced semiconductor packaging technology. Celebrating its 73rd anniversary this year, ECTC is an international event hosted by the Electronics Packaging Society under the IEEE, and is a place where experts in the field of electronic parts, materials, packaging, and IoT attend to discuss next-generation semiconductor technologies. At this event, Nepes introduced next-generation PoP (Package on Package), 2.5D, and 3D stacking technologies as well as the world's first 600mm FOPLP solution that was successfully mass-produced. FOPLP is a next-generation packaging solution that implements a fan-out package on a large square panel with a size of 600mm × 600mm, a step forward from the existing 300mm circular fan-out wafer level packaging (FOWLP). On the 31st, a paper titled “6-Sided Die Protection for Chiplet Package with Multi-Layer RDL” was selected and presented.
2023-06-02 -
Nepes joins 'UCIe' consortium to establish semiconductor packaging standards
Nepes participate in the UCIe(Universal Chiplet Interconnect Express) consortium launched to establish an industry standard for ‘Next-generation chip packaging technology’.Semiconductor companies such as ▲AMD ▲Arm ▲Qualcomm ▲ASE, including TSMC and Intel, and IT companies such as ▲Google Cloud ▲Meta ▲Microsoft also participated in the consortium.The consortium aims to establish UCIe as a new connectivity standard such as PCIe, USB, NVMe, etc.Members will soon begin working on the creation of the next-generation UCIe technology standard, including the chiplet form factor, management, enhanced security and other essential protocol definitions after the UCIe 1.0 specification is drafted.If the UCIe standard is established, it is compatible with other companies' chiplet structures. This can lead to cost savings and faster time to market.
2022-08-19 -
Nepes integrates packaging with advanced fan-out technology
“Heterogeneous integration,” a hot keyword in the global semiconductor marketNepes’s fan-out technology-applied “nSiP” & “nPoP” are the alternativesThe global semiconductor industry started to focus on the back-end process. As Moore’s law, which states that the semiconductor density doubles every two years, is no longer valid, and miniaturization of circuits in the front-end process is reaching its limit, the industry players are looking for alternatives. Among the alternatives, the “Heterogeneous Integration Packaging,” also referred to as a 2D and 3D packaging has been gaining attentions as the next-generation technology. It attaches chips in series and integrates them to a single semiconductor piece. On July 7th,Nepes introduced its unique technology “nSiP’ and “nPoP” along with the trends of the next-generation heterogeneous integration packaging at “Semiconductor Packaging Day 2022” held by Electronics Times, a Korean IT news media.Nepes is an advanced semiconductor packaging company that supplies the Wafer Level Packaging(WLP), Fan-Out Panel Level Packaging(FOPLP) and more.It is a pioneer in the back-end process as it commercialized the FOPLP technology for 600x600mm square panels, not round panels, for the first time in the world in May 2017.System in Package(SiP) introduced by Nepes at the conference, is a heterogeneous integration packaging technology with various functions put into a single chip. Nepes’s unique technology “nSiP” does not contain components such as substrates, reducing the packaging size to one third and shortening the signal transmission distance by 30% for performance improvement. Nepes produced its first commercialized nSiP in January. Package on Package(PoP) is a technology that adds a layer of package with a different function on top of another package. This technology minimizes heat generation from the chips and lowers the packaging thickness by 26% compared to competitors’ products. Mass production is scheduled to be in 4Q, 2023.Nepes’s unique packaging technologies are based on the Fan-Out technology that utilizes the Re-Distribution Layer(RDL). In the Fan-Out technology, the input/output terminals are located outside the chips to fit in a higher number of terminals. It is expected to be the solution for the ultra-high-performance and high-integration packaging market since it can be used to layer or expand different sizes of chips as well as to improve the electrical properties and thermal efficiency, In the meantime, the global packaging market size is expected to be driven by the SiP, Fan-Out, and PoP technologies and reach a $9.6 billion scale by 2026 according Yole, a market analysis firm. The PoP’s market share is expected to increase particularly high from 5% to 11%. Read more: https://www.digitaljournal.com/pr/nepes-integrates-packaging-with-advanced-fan-out-technology#ixzz7aC8RY0hV
2022-07-27 -
[Semiconductor Packaging Day 2022] Nepes expands the application area of FO-PLP. - ETnews
[Semiconductor Packaging Day 2022] Nepes expands the application area of FO-PLP. Nepes will expand its mass-production products using fan-out-panel level packages (FO-PLP), one of the most advanced packaging technologies. Following the Power Management Integrated Circuit (PMIC), market will be expanded with codec chips and application processors (AP). It will also respond to demand for next-generation packing markets such as system-inpackage (SiP) and 2.5 and 3D utilizes Nepes' advanced fan-out (FO) technology. During the “Semiconductor Packaging Day 2022”, Kim Jong-heon, Nepes' Corporate CTO of Semiconductor Business (Executive Vice President), said in “We are increasing applications such as codecs after last year’s mass-production of the world’s first PMIC with FO-PLP", “We will mass-produce AP, and APU, which combines AP and GPU, as FO-PLP in the future.,” he addedFO-PLP is a technique that packages square panels rather than round warfers. Nepes has a mass production technology of 600mm panels in width and height. It is considered a next-generation technology that can increase production speed by more than five times compared to packaging on a typical 12-inch wafer. Nepes have been supplying PMIC of global semiconductor companies with FO-PLP since the fourth quarter of last year. For the first time in the industry, Nepes has invested hundreds of billions won in building FO-PLP mass production facilities. Nepes have also begun the mass production of codec chips as well as PMIC. It is known that other chips, such as AP, are currently being discussed with customers for the mass production of FO-PLP. The specific customer company is not disclosed. Vice President Kim said, “In addition to single-chip FO-PLP, there are many more products when considering the packaging of two or more chips. The expansion of the FO-PLP market is as expected. Nepes will also be launching its next-generation packaging market. Typical examples are 2.5D and 3D packaging, and 3D package-on-package (PoP) technology. PoP is a technology that stacked packages which function differently from packages. Nepes developed an ultra-thin PoP with minimal heat and reduced package thickness and passed the technical qualification. Vice President Kim explained that the packaging thickness can be reduced up to 26% compared to his competitors. SiP without substrates is also a field that Nepes focuses on. It introduced its first mass-production product earlier this year with SiP that utilizes Nepes' own RDL technologies. It reduces the size to one-third of the existing package and shortens the signal transmission distance by 30%. Nepes is also developing a 3D stacking technology that vertically stacked semiconductors. Nepes' entry into the next-generation packaging market is based on its excellent fan-out technology. Fan-out is a technology that increases the number of I/Os by placing semiconductor input and output terminals (I/O) outside of the chip and can exchange more signals. Vice President Kim said, “Nepes possesses a wide range of advanced packaging technologies to provide packaging solutions that are ahead of their time.”he also said “We plan to play a role as a high-tech back-end foundry rather than a simple back-end process.”
2022-07-12